Patents
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Mallika Prakash, Peter A. Beerel. “Static timing analysis of template-based asynchronous circuits,” United States Patent No. 8,972,915, March 3, 2015.
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Georgios Dimou, Peter A. Beerel, Andrew Lines. Multi-level domino, bundled data, and mixed templates, July 23, 2013, United States Patent No. 8,495,543.
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Georgios Dimou, Peter A. Beerel, Andrew Lines. Clustering and fanout optimizations of asynchronous circuits, May 21, 2013. United States Patent No. 8,448,105.
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Ken Shiring, Peter A. Beerel, Andrew Lines, and Arash Saifhashemi. "Power aware asynchronous circuits", Dec 27, 2011, United States Patent No. 8,086,975.
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Peter Beerel, Andrew Lines, Michael Davies: Logic synthesis of multi-level domino asynchronous pipelines. Nov 1, 2011: US Patent No. 8,051,396.
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Peter A. Beerel, Keith M. Chugg, Georgios D. Dimou, Phunsak Thiennviboon. "Reduced-latency soft-input/soft-output module" March 27, 2007. United States Patent No. 7,197,691.
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Frederik Eaton and Peter A. Beerel. "Optimization of cell subtypes in a hierarchical design flow" February 8, 2005. United States Patent No. 6,854,096.
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Peter A. Beerel, Andrew Lines, and Qing Wu. "Methods and apparatus for facilitating physical synthesis of an integrated circuit design" August 31, 2004. United States Patent No. 6,785,875.
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Peter A.Beerel; Keith M. Chugg; Recep Ozdag; Sunan Tugsinavisut; Sushil K. Singh; Phunsak Thiennviboon. "Sequential decoder for decoding of convolutional codes" February 10, 2004. United States Patent No. 6,690,752.
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Aiguo Xie and Peter A. Beerel. "Formal Verification of a Logic Design Using Implicit Enumeration of Strongly Connected Components.'' February 25th, 2003. United States Patent No. 6,536,551.
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Ken Stevens, Shai Rotem, Ran Ginosar, Peter Beerel, Ken Yun, Chris Myers, Rakefet Kol. "Apparatus and Method for Parallel Processing and Self-Timed Serial Marking of Variable Length Instructions''. November 2, 1999. United States Patent No. 5,978,899.
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Ken Stevens, Shai Rotem, Ran Ginosar, Peter Beerel, Ken Yun, Chris Myers, Rakefet Kol. "Apparatus and Method for Self-Timed Marking of Variable Length Instruction Having Length-Affecting Prefix Bytes''. Sept 7, 1999. United States Patent No. 5,948,096
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Ken Stevens, Shai Rotem, Ran Ginosar, Peter Beerel, Ken Yun, Chris Myers, Rakefet Kol. "Efficient Self-Timed Marking of Lengthy Variable Length Instructio ns''. 24 August 1999. United States Patent No. 5,941,982
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Ken Stevens, Shai Rotem, Ran Ginosar, Peter Beerel, Ken Yun, Chris Myers, Rakefet Kol. "Branch Instruction Handling in a Self-Timed Marking System''. August 3, 1999. United States Patent No. 5,931,944