Theses
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Power optimization of asynchronous pipelines using conditioning and reconditioning based on a three-valued logic model, Arash Saifhashemi, Ph.D. Thesis, University of Southern California, December 2012.
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Theory, Implementations, and Applications, of Single-Track Designs, P. Pankaj, Ph.D. Thesis, University of Southern California, May 2010.
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Clustering and Fanout Optimization of Asynchronous Circuits, G. Dimou, Ph.D. Thesis, University of Southern California, May 2009.
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Static Timing Analysis of GasP, P. Joshi, MS. Thesis, University of Southern California, Dec 2008.
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Library Characterization and Static Timing Analysis of Asynchronous Circuits, M. Prakash, MS. Thesis, University of Southern California, Dec 2007.
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Single-track Asynchronous Pipeline Template, M. Ferretti, Ph.D. Thesis, University of Southern California, Aug, 2004.
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Template-Based Asynchronous Circuit Design, R.O. Ozdag, Ph.D. Thesis, University of Southern California, Nov, 2003.
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Low-Power Circuit Techniques for Battery-Powered DSP Applications, J.S. Moon, Ph.D. Thesis, University of Southern California, June, 2003.
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Pipeline Optimization for Asynchronous Circuits: Complexity Analysis and an Efficient Optimal Algorithms, S. Kim, Ph.D. Thesis, University of Southern California, May, 2003.
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Induced Hierarchical Verification of Asynchronous Circuits Using a Partial Order Technique, V. Vakilotojar, Ph.D. Thesis, University of Southern California, August, 1999.
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Performance Analysis of Asynchronous Circuits and Systems, A. Xie, Ph.D. Thesis, University of Southern California, August, 1999.
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Optimizing Average-Case Performance in the Technology Mapping of Asynchronous Circuits , W.-C. Chou, Ph.D. Thesis, University of Southern California, August, 1999.
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BDD Minimization using Don't Cares for Formal Verification and Logic Syntheis, Y. Hong, Ph.D. Thesis, University of Southern California, August, 1998.
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CAD Tools for the Synthesis, Verification, and T estability of Robust Asynchronous Circuits, P. A. Beerel, Ph.D. Thesis, Stanford University, August, 1994.